About
Expertise in structure-process-property relationships, rheology, and polymer/composite development.
Skilled in wafer and panel-level packaging: fan-in, fan-out, flip-chip, die embedding.
Experienced with domestic and international cross-functional teams.
Professional Experience
Associate Professor
February 2020 - Current
INDIAN INSTITUTE OF TECHNOLOGY JODHPUR, Jodhpur, Rajasthan, India Department of Chemical Engineering Research Areas: Polymer nanocomposites for electronic packaging and healthcare
Research Packaging Engineer
August 2016 - May 2018
FUJIFILM ELECTRONIC MATERIALS, North Kingstown, RI, USADeveloped materials for advanced electronic packaging. Successfully formulated a polymer dielectric platform that passed reliability at an industrial consortium led by a partner lab.
Process Integrator/ Project Lead/ Material & Process Development
October 2011 - May 2016
INTEL CORPORATION, Chandler, AZ, USA
Substrate Technology Development
Contributed to enable high volume manufacturing and competitive advantage for the high-density inter-connect substrates resulting in savings of $4 billion and more.
Contributed to the development of coreless and die-embedding technologies starting from ground up to 90% yield in a technology development phase.
Awarded with nine departmental, two divisional, one group and seven peer-to-peer recognitions.